Can 0 bus timing register 1 (c0bt1) – Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement User Manual
Page 141
High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
141
SMP
Bit 7
TSEG26–24
Bits 6–4
CAN sampling rate. The sampling rate (SMP) bit determines the number of samples to be taken dur-
ing each receive bit time. Programming SMP = 0 takes only one sample during each bit time.
Programming SMP = 1 directs the CAN logic to take three samples during each bit time, and to use a
majority voting circuit to determine the final bit value. When SMP is set to a 1, two addition al t
qu
clock
cycles are added to time segment 1. SMP should not be set to 1 when the baud-rate prescale value
(BRPV) is less than 4. This bit can be modified only during a software initialization (SWINT = 1).
CAN time segment 2 select. The eight states defined by the TSEG26–TSEG24 bits determine the num-
ber of clock cycles in the phase segment 2 portion of the nominal bit time, which occurs after the sam-
ple time. These bits can be modified only during a software initialization (SWINT = 1).
TSEG26
TSEG25
TSEG24
TIME SEGMENT 2 LENGTH
(Number in parentheses is
TS2_LEN value used in bit
timing calculations)
0
0
0
Invalid
0
0
1
2 t
qu
(2)
0
1
0
3 t
qu
(3)
—
—
—
—
1
1
0
7 t
qu
(7)
1
1
1
8 t
qu
(8)
TSEG13–10
Bits 3–0
CAN time segment 1 select. The 16 states defined by the TSEG13–TSEG10 bits determine the num-
ber of clock cycles in the phase segment 1 portion of the nominal bit time, which occurs before the sam-
ple time. These bits can be modified only during a software initialization (SWINT = 1).
TSEG13
TSEG12
TSEG11
TSEG10
TIME SEGMENT 1 LENGTH
(Number in parentheses is
TS1_LEN value used in bit
timing calculations)
0
0
0
0
Invalid
0
0
0
1
2 t
qu
(2)
0
0
1
0
3 t
qu
(3)
–
–
–
–
–
1
1
1
0
15 t
qu
(15)
1
1
1
1
16 t
qu
(16)
CAN 0 Bus Timing Register 1 (C0BT1)
MOVX Address
1
7
6
5
4
3
2
1
0
xxxx05h
SMP
TSEG26
TSEG25
TSEG24
TSEG13
TSEG12
TSEG11
TSEG10
Maxim Integrated