Position loop - registration, Encoder 0 and 1 registration – Rockwell Automation 20D PowerFlex 700S AC Drives with Phase II Control Reference Manual User Manual
Page 105
Rockwell Automation Publication PFLEX-RM003E-EN-E - January 2011
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Detailed Drive Operation Chapter 1
• When parameter 240 [Encdr1 Position] becomes greater than 100,000
counts, parameter 741 [Position Status], bit 8 “Posit Watch1” is set to 1.
Note that the position must pass 100,000 counts. If the motor position is
already past 100,000 counts when the position watch is enabled, the
position watch status bit will not detect the position until 100,000 counts
is passed again.
• Set parameter 740 [Position Control], bit 16 “X Watch1 En” = 0 to reset
parameter 741 [Position Status], bit 8 “Posit Watch1” to 0.
Position Loop - Registration
The PowerFlex 700S drive has the ability to capture the feedback position upon
an event occurrence using registration. When using DriveLogix™ Motion with the
PowerFlex 700S, the Motion Arm Registration (MAR) can be used to control
registration.
Encoder 0 and 1 Registration
There are two registration latches where each one can be configured for Encoder
0 or Encoder 1. However, when “Z-phase” is selected as the trigger source,
registration latch 0 is dedicated to Encoder 0 and registration latch 1 is dedicated
to Encoder 1.
• Parameter 235 [RegisLtch0 Value] displays the registration data of port 0
and indicates the position reference counter value latched by the external
strobes. The strobe signal used to trigger the latch is configurable by
Parameter 236 [RegisLtch0/1 Cnfg].
• Parameter 236 [RegisLtch0/1 Cnfg] configures the registration latch at
port 0 or port 1 to be used with Encoder 0 or Encoder 1, respectively.
– Bits 0 “RL0 Encoder1” and 16 “RL1 Encoder1” select the encoder for
the input source of latched data. Setting bit 0 selects encoder 1, resetting
the bit to zero selects encoder 0.
– Bits 1 “RL0 TrgSrc0”, 2 “RL0 TrgSrc1”, 17 “RL1 TrgSrc0” and 18 “RL1
TrgSrc1” select the trigger source (see
).
– Bits 3 “RL0 TrgEdge0”, 4 “RL0 TrgEdge1”, 19 “RL1 TrgEdge0” and 20
“RL1 TrgEdge1” select which edges signal the position (see
).
– Bits 5 “RL0 Dir Rev”, 6 “RL0 Dir Fwd”, 21 “RL1 Dir Rev” and 22 “RL1
Dir Fwd” set the direction of position capture (see
).
– Bits 8 “SL DI Filt 0”, 9 “SL DI Filt 1”, 10 “SL DI Filt 2”, and 11 “SL DI
Filt 3” configure a filter for the digital input 1 and 2 (see
). The filter requires the input signal to be stable for the
specified time period. Input transitions within the filter time setting
will be ignored. Bits 8…11 add 100 ns filter per stage to external trigger.