Lcd palette registers, Least significant word (pallsw), Most significant word (palmsw) – Cirrus Logic EP73xx User Manual
Page 98: Lcd palette registers -8, Palmsw), Most significant word, Address, Bit descriptions
9-8
EP7309/11/12 User’s Manual - DS508UM4
Copyright Cirrus Logic, Inc. 2003
LCD Interface
9
GSEN[30]: Gray scale enable bit. Enables gray scale output to the LCD.
When cleared, each bit in the video map directly corresponds to a
pixel in the display.
GSMD[31]: Gray scale mode bit. Clearing this bit sets the controller to 2 bpp
(4-gray scale). Setting this bits enables 4 bpp (16-gray scale).
LCD Palette Registers
Least Significant Word (PALLSW)
Address:
0x8000.0580, Read / Write
Most Significant Word
(PALMSW)
Address:
0x8000.0540, Read / Write
Bit Descriptions:
The least and most significant word of the LCD palette registers
(read/write) map the pixel value stored in the frame buffer to a
physical gray scale level. The two 32-bit registers define all gray
scale levels for a total of 4 bpp. If 2 bpp is required, only the palette
least significant word need be programmed. At 1 bpp, only the first
two nibbles in the least significant register are required to be
programmed.
represents the mapping of the pixel value from memory to the
gray scale value programmed into the registers.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Gray scale value for pixel value 7
Gray scale value for pixel value 6
Gray scale value for pixel value 5
Gray scale value for pixel value 4
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Gray scale value for pixel value 4
Gray scale value for pixel value 3
Gray scale value for pixel value 2
Gray scale value for pixel value 1
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Gray scale value for pixel value 15
Gray scale value for pixel value 14
Gray scale value for pixel value 13
Gray scale value for pixel value 12
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Gray scale value for pixel value 11
Gray scale value for pixel value 10
Gray scale value for pixel value 9
Gray scale value for pixel value 8