Cirrus Logic EP73xx - Manual (Page 157)

EP7309/11/12 User’s Manual - DS508UM4 Index-1
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Copyright Cirrus Logic, Inc. 2003
1 Index
Index
B
Boot Mode
External 6-2
Internal 6-2
C
Cache 2-5
clocks
CPU 2-9
External 13 MHz 2-11
CPU
clocks 2-9
State Control 2-12
Idle State 2-13
Standby State 2-12
D
Debug Interface 2-7
DMA Controller 9-3
E
Endianess 6-4
External Boot Mode 6-2
I
Internal Boot Mode 6-2
Interrupt
Latencies in Different States 4-6
Idle State 4-6
Operating State 4-6
Standby State 4-7
Listing 4-5
Operation 4-4
Priorities 4-4
Types 4-4
K
Keyboard
Interrupt Matrix 10-2
L
LCD
Color LCDs 9-6
DMA Controller 9-3
External Memory 9-2
Grayscale 9-4
Hardware Interface 9-6
M
Memory Map 1-2
MMU 2-4
P
Pin Description 1-6
pin descriptions, external signal functions 1-7
Pin Multiplexing
DAI/CODEC/SSI2 1-10
GPIO 11-2
PLL 2-10
Clock Characteristics 2-10
Interface Requirements 2-10
Power Up Sequence 2-14
R
Real Time Clock
Characteristics 2-9
Interface Requirements 2-9
Register Definitions
CPU 2-7–2-15
GPIO 11-2
Interrupts 4-8–4-14
LCD 9-7–9-9
LED Flasher 13-2
PWM 12-3
SDRAM 7-3–7-4
SRAM 8-3–8-5
System Registers 5-4–5-13
Timers 3-3
RESET 2-15
RTC. See Real Time Clock
S
SDRAM
Byte Masks 7-3
System Initialization 7-2
System Registers
Buzzer 5-3
Debug mode 5-3
T
Timers
Free Running Mode 3-2
Prescale Mode 3-3
RTC Timer 3-3