Cirrus Logic EP73xx - Manual (Page 13)

EP7309/11/12 User’s Manual - DS508UM4 xii

Copyright Cirrus Logic, Inc. 2003
Table 16-6: Programmable Audio Divisors at 90 MHz ............................................................................. 16-6
Table 17-1: UART and SIR Encoder Registers ............................................................................................ 17-1
Table 17-2: UART Bit Rates at 90 MHz ........................................................................................................ 17-2
Table 17-3: UART Bit Rate in PLL Clock Mode (74 MHz) ........................................................................ 17-3
Table 17-4: UART Bit Rate from 13 MHz Clock ......................................................................................... 17-3
Table 17-5: Word Length Selection............................................................................................................... 17-6