Rainbow Electronics DS1874 - Manual (Page 53)

DS1874
SFP+ Controller with Digital LDD Interface
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Table 01h, Register FCh: WARN EN
3
POWER-ON VALUE 00h
READ ACCESS PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
WRITE ACCESS PW2 or (PW1 and RWTBL1C)
MEMORY TYPE Nonvolatile (SEE)
F8h TEMP HI TEMP LO VCC HI VCC LO MON1 HI MON1 LO MON2 HI MON2 LO
BIT 7 BIT 0
Layout is identical to WARN 3 in Lower Memory, Register 74h. Enables warnings to create TXFINT (Lower Memory,
Register 71h) logic. The MASK bit (Table 02h, Register 89h) determines whether this memory exists in Table 01h
or 05h.
BIT 7
TEMP HI:
0 = Disables interrupt from TEMP HI warning.
1 = Enables interrupt from TEMP HI warning.
BIT 6
TEMP LO:
0 = Disables interrupt from TEMP LO warning.
1 = Enables interrupt from TEMP LO warning.
BIT 5
VCC HI:
0 = Disables interrupt from VCC HI warning.
1 = Enables interrupt from VCC HI warning.
BIT 4
VCC LO:
0 = Disables interrupt from VCC LO warning.
1 = Enables interrupt from VCC LO warning.
BIT 3
MON1 HI:
0 = Disables interrupt from MON1 HI warning.
1 = Enables interrupt from MON1 HI warning.
BIT 2
MON1 LO:
0 = Disables interrupt from MON1 LO warning.
1 = Enables interrupt from MON1 LO warning.
BIT 1
MON2 HI:
0 = Disables interrupt from MON2 HI warning.
1 = Enables interrupt from MON2 HI warning.
BIT 0
MON2 LO:
0 = Disables interrupt from MON2 LO warning.
1 = Enables interrupt from MON2 LO warning.