Ds1874 sfp+ controller with digital ldd interface – Rainbow Electronics DS1874 User Manual
Page 50

DS1874
SFP+ Controller with Digital LDD Interface
50
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Table 01h, Register F9h: ALARM EN
2
POWER-ON
VALUE
00h
READ ACCESS
PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
WRITE ACCESS
PW2 or (PW1 and RWTBL1C)
MEMORY TYPE
Nonvolatile (SEE)
F9h
MON3 HI
MON3 LO
MON4 HI
MON4 LO
RESERVED
RESERVED
RESERVED
RESERVED
BIT
7
BIT
0
Layout is identical to ALARM
2
in Lower Memory, Register 71h. Enables alarms to create TXFINT (Lower Memory,
Register 71h) logic. The MASK bit (Table 02h, Register 89h) determines whether this memory exists in Table 01h or
05h.
BIT
7
MON3 HI:
0 = Disables interrupt from MON3 HI alarm.
1 = Enables interrupt from MON3 HI alarm.
BIT
6
MON3 LO:
0 = Disables interrupt from MON3 LO alarm.
1 = Enables interrupt from MON3 LO alarm.
BIT
5
MON4 HI:
0 = Disables interrupt from MON4 HI alarm.
1 = Enables interrupt from MON4 HI alarm.
BIT
4
MON4 LO:
0 = Disables interrupt from MON4 LO alarm.
1 = Enables interrupt from MON4 LO alarm.
BIT
3:0
RESERVED