Sundance SMT712 - Manual (Page 76)

User Manual SMT712 Page 76 of 89 Last Edited: 11/12/2012 10:36:00
Offset 0x0400 – DACA DCM Phase Shifts – 0x1D4 (write).
Setting Bit 8 DACA DCM Sign of Phase Shift
0 0x0 Positive phase shift
1 0x1 Negative phase shift
Setting Bit 7-0 DACA DCM Phase Shift value
0 8-bit phase shift value.
The default firmware implements one DCM_ADV (see Xilinx Virtex 5 documentation
for more details) per DAC data path, i.e. one DCM_ADV for DACA and one for DACB.
Both are set to have a programmable phase shift, which means it can be changed
from the host application. Both DCMs are set in mode VARIABLE_CENTER.
There is one bit to set the sign of the phase shit and 8 bit to set the value. The phase
shift range is -255…+255. Once the control word of send, the DCM is being reset
and programmed with the new phase shift. By default, the shift register is set to 0.
4.6.1.1.75 DACB DCM Phase Shifts – 0x1D8 (write).
Offset 0x0400 – DACB DCM Phase Shifts – 0x1D8 (write).
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
1 DACB DCM
Phase Shift
Sign
Default ‘0’
0 DACB DCM Phase Shift[7:0]
Default ‘00000000’
Offset 0x0400 –DACB DCM Phase Shifts – 0x1D8 (write).
Setting Bit 8 DACB DCM Sign of Phase Shift
0 0x0 Positive phase shift
1 0x1 Negative phase shift
Setting Bit 7-0 DACB DCM Phase Shift value
0 8-bit phase shift value.
The default firmware implements one DCM_ADV (see Xilinx Virtex 5 documentation
for more details) per DAC data path, i.e. one DCM_ADV for DACA and one for DACB.
Both are set to have a programmable phase shift, which means it can be changed
from the host application. Both DCMs are set in mode VARIABLE_CENTER.
There is one bit to set the sign of the phase shit and 8 bit to set the value. The phase
shift range is -255…+255. Once the control word of send, the DCM is being reset
and programmed with the new phase shift. By default, the shift register is set to 0.