Sundance SMT712 - Manual (Page 67)

User Manual SMT712 Page 67 of 89 Last Edited: 11/12/2012 10:36:00
Clock Generator (AD9516-2) Register 0x199 – Divider3 – 0x184 (write)
Setting Bit 7..4 Description (Divider 3.1 Low Cycles)
0 Number of clock cycles of the divider input during which divider output stays low.
Setting Bit 3..0 Description (Divider 3.1 High Cycles)
0 Number of clock cycles of the divider input during which divider output stays high.
4.6.1.1.55 Clock Generator (AD9516-2) Register 0x19A – Divider3 –
0x188 (write).
Clock Generator (AD9516-2) Register 0x19A – Divider3 – 0x188 (write)
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Phase Offset Divider 3.2 Phase Offset Divider 3.1
Default ‘0000’ ‘0000’
Clock Generator (AD9516-2) Register 0x19A – Divider3 – 0x188 (write)
Setting Bit 7..4 Description (Phase Offset Divider 3.2)
0 Phase Offset.
Setting Bit 3..0 Description (Phase Offset Divider 3.1)
0 Phase Offset.
4.6.1.1.56 Clock Generator (AD9516-2) Register 0x19B – Divider3 –
0x18C (write).
Clock Generator (AD9516-2) Register 0x19B – Divider3 – 0x18C (write)
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Divider 3.2 Low Cycles Divider 3.2 High Cycles
Default ‘0001’ ‘0001’
Clock Generator (AD9516-2) Register 0x19B – Divider3 – 0x18C (write)
Setting Bit 7..4 Description (Divider 3.2 Low Cycles)
0 Number of clock cycles of the divider input during which divider output stays low.
Setting Bit 3..0 Description (Divider 3.2 High Cycles)
0 Number of clock cycles of the divider input during which divider output stays high.
4.6.1.1.57 Clock Generator (AD9516-2) Register 0x19C – Divider 3 –
0x190 (write).
Clock Generator (AD9516-2) Register 0x19C – Divider 3 – 0x190 (write)
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Reserved Bypass
Divider
3.2
Bypass
Divider
3.1
Divider 3
Nosync
Divider 3
Force High
Start High
Divider
3.2
Start High
Divider
3.1