Sundance SMT712 User Manual
Page 6
User Manual SMT712
Page 6 of 89
Last Edited: 11/12/2012 10:36:00
4.6.1.1.58
Clock Generator (AD9516-2) Register 0x19D – Divider3 – 0x194
(write).
68
4.6.1.1.59
Clock Generator (AD9516-2) Register 0x19E – Divider4 – 0x198
(write).
68
4.6.1.1.60
Clock Generator (AD9516-2) Register 0x19F – Divider4 – 0x19C
(write).
69
4.6.1.1.61
Clock Generator (AD9516-2) Register 0x1A0 – Divider4 – 0x1A0
(write).
69
4.6.1.1.62
Clock Generator (AD9516-2) Register 0x1A1 – Divider 4 –
0x1A4 (write). .............................................................................................................69
4.6.1.1.63
Clock Generator (AD9516-2) Register 0x1A2 – Divider4 – 0x1A8
(write).
70
4.6.1.1.64
Clock Generator (AD9516-2) Register 0x1E0 – VCO Divider –
0x1AC (write). .............................................................................................................70
4.6.1.1.65
Clock Generator (AD9516-2) Register 0x1E1 – Input CLKs –
0x1B0 (write)...............................................................................................................71
4.6.1.1.66
System Monitor – FPGA Die Temperatures – 0x1C0 (read)........72
4.6.1.1.67
System Monitor – FPGA Die Temperature thresholds – 0x1C0
(write).
72
4.6.1.1.68
System Monitor – FPGA Core Voltages – 0x1C4 (read). ..............73
4.6.1.1.69
System Monitor – FPGA core voltage thresholds – 0x1C4 (write).
73
4.6.1.1.70
System Monitor – FPGA Aux Voltages – 0x1C8 (read). ...............74
4.6.1.1.71
System Monitor – FPGA aux voltage thresholds – 0x1C8 (write).
74
4.6.1.1.72
DDS Frequency Register DACA – 0x1CC (write)...........................75
4.6.1.1.73
DDS Frequency Register DACB – 0x1D0 (write). ..........................75
4.6.1.1.74
DACA DCM Phase Shifts – 0x1D4 (write).......................................75
4.6.1.1.75
DACB DCM Phase Shifts – 0x1D8 (write). ......................................76
4.6.1.1.76
Pattern size DACA – 0x1DC (write). ................................................77
4.6.1.1.77
Pattern size DACB – 0x1E0 (write)...................................................77
4.6.2
DAC Synchronisation.............................................................................................77
4.6.3
External Signal characteristics.............................................................................79
5
Board Layout ....................................................................................................................81
5.1
Top View........................................................................................................................81
5.2
Bottom View. ................................................................................................................83
5.3
Front panel....................................................................................................................84
6
Software Packages ..........................................................................................................85
7
Physical Properties .........................................................................................................87
8
Safety ..................................................................................................................................88
9
EMC......................................................................................................................................88
10
Ordering Information.....................................................................................................88