Sundance SMT712 - Manual (Page 56)

User Manual SMT712 Page 56 of 89 Last Edited: 11/12/2012 10:36:00
4.6.1.1.35 Clock Generator (AD9516-2) Register 0xF0 – OUT0 –
0x138 (write).
Clock Generator (AD9516-2) Register 0xF0 – OUT0 – 0x138 (write)
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Reserved Reserved Reserved OUT0
Invert
OUT0 LVPECL
Differential Voltage
OUT0 Power-down
Default ‘0’ ‘0’ ‘0’ ‘0’ ‘10’ ‘00’
Clock Generator (AD9516-2) Register 0xF0 – OUT0 – 0x138 (write)
Setting Bit 4 Description (OUT0 Invert)
0 0 noninverting.
1 1 inverting.
Setting Bit 3..2 Description (OUT0 LVPECL Differential Voltage - (VOD - mV))
3 ‘11’ 960
2 ‘10’ 780
1 ‘01’ 600
0 ‘00’ 400
Setting Bit 1..0 Description (OUT0 Power-down)
3 ‘11’ Total power-down, reference off; use only if there are no external load resistors. Off.
2 ‘10’ Partial power-down, reference on, safe LVPECL power-down.
1 ‘01’ Partial power-down, reference on; use only if there are no external load resistors.
0 ‘00’ Normal operation.
4.6.1.1.36 Clock Generator (AD9516-2) Register 0xF1 – OUT1 –
0x13C (write).
Clock Generator (AD9516-2) Register 0xF1 – OUT1 – 0x13C (write)
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Reserved Reserved Reserved OUT1
Invert
OUT1 LVPECL
Differential Voltage
OUT1 Power-down
Default ‘0’ ‘0’ ‘0’ ‘0’ ‘10’ ‘10’
Clock Generator (AD9516-2) Register 0xF1 – OUT1 – 0x13C (write)
Setting Bit 4 Description (OUT1 Invert)
0 0 noninverting.
1 1 inverting.
Setting Bit 3..2 Description (OUT1 LVPECL Differential Voltage - (VOD - mV))
3 ‘11’ 960
2 ‘10’ 780
1 ‘01’ 600
0 ‘00’ 400