Sundance SMT712 - Manual (Page 30)

User Manual SMT712 Page 30 of 89 Last Edited: 11/12/2012 10:36:00
0xCC Clock Generator (AD9516-2) register 0x11 – R
Counter Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x11 – R Counter
0xD0 Clock Generator (AD9516-2) register 0x12 – R
Counter Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x12 – R Counter
0xD4 Clock Generator (AD9516-2) register 0x13 – A
Counter Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x13 – A Counter
0xD8 Clock Generator (AD9516-2) register 0x14 – B
Counter Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x14 – B Counter
0xDC Clock Generator (AD9516-2) register 0x15 – B
Counter Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x15 – B Counter
0xE0 Clock Generator (AD9516-2) register 0x16 – PLL
Control 1 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x16 – PLL Control 1
0xE4 Clock Generator (AD9516-2) register 0x17 – PLL
Control 2 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x17 – PLL Control 2
0xE8 Clock Generator (AD9516-2) register 0x18 – PLL
Control 3 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x18 – PLL Control 3
0xEC Clock Generator (AD9516-2) register 0x19 – PLL
Control 4 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x19 – PLL Control 4
0xF0 Clock Generator (AD9516-2) register 0x1A – PLL
Control 5 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x1A – PLL Control 5
0xF4 Clock Generator (AD9516-2) register 0x1B – PLL
Control 6 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x1B – PLL Control 6
0xF8 Clock Generator (AD9516-2) register 0x1C – PLL
Control 7 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x1C – PLL Control 7
0xFD Clock Generator (AD9516-2) register 0x1D – PLL
Control 8 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x1D – PLL Control 8
0x100 Clock Generator (AD9516-2) register 0x1E – PLL
Control 9 Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x1E – PLL Control 9
0x104 Clock Generator (AD9516-2) register 0x1F – PLL
readback Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0x1F – PLL readback
0x108 Clock Generator (AD9516-2) register 0xA0 – OUT6
Delay Bypass Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA0 – OUT6 Delay Bypass
0x10C Clock Generator (AD9516-2) register 0xA1 – OUT6
Delay Full Scale Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA1 – OUT6 Delay Full Scale
0x110 Clock Generator (AD9516-2) register 0xA2 – OUT6
Delay Fraction Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA2 – OUT6 Delay Fraction
0x114 Clock Generator (AD9516-2) register 0xA3 – OUT7
Delay Bypass Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA3 – OUT7 Delay Bypass
0x118 Clock Generator (AD9516-2) register 0xA4 – OUT7
Delay Full Scale Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA4 – OUT7 Delay Full Scale
0x11C Clock Generator (AD9516-2) register 0xA5 – OUT7
Delay Fraction Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA5 – OUT7 Delay Fraction
0x120 Clock Generator (AD9516-2) register 0xA6 – OUT8
Delay Bypass Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA6 – OUT8 Delay Bypass
0x124 Clock Generator (AD9516-2) register 0xA7 – OUT8
Delay Full Scale Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA7 – OUT8 Delay Full Scale
0x128 Clock Generator (AD9516-2) register 0xA8 – OUT8
Delay Fraction Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA8 – OUT8 Delay Fraction
0x12C Clock Generator (AD9516-2) register 0xA9 – OUT9
Delay Bypass Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xA9 – OUT9 Delay Bypass
0x130 Clock Generator (AD9516-2) register 0xAA –
OUT9 Delay Full Scale Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xAA – OUT9 Delay Full Scale
0x134 Clock Generator (AD9516-2) register 0xAB – OUT9
Delay Fraction Read-back (FPGA Register) Clock Generator
(AD9516-2) register 0xAB – OUT9 Delay Fraction