Sundance SMT712 User Manual
Page 40
User Manual SMT712
Page 40 of 89
Last Edited: 11/12/2012 10:36:00
Setting
Bit 7
Description (PFD Polarity)
0
0
positive (higher control voltage produces higher frequency).
1
1
negative (higher control voltage produces lower frequency).
Setting
Bit 4..6
Description (Charge Pump Current)
7
111
4.8mA
5
110
4.2mA.
5
101
3.6mA.
4
100
3.0mA.
3
011
2.4mA.
2
010
1.8mA.
1
001
1.2mA.
0
000
0.6mA.
Setting
Bit 2..3
Description (Charge Pump Mode)
3
11
Normal operation.
2
10
Force sink current (pump down).
1
01
Force source current (pump up).
0
00
High impedance state.
Setting
Bit 1..0
Description (PLL Power Down)
3
11
Synchronous power-down.
2
10
Normal operation.
1
01
Asynchronous power-down.
0
00
Normal operation.
4.6.1.1.9
Clock Generator (AD9516-2) Register 0x11 – R Counter –
0xCC (write).
Clock Generator (AD9516-2) Register 0x11 – R Counter – 0xCC (write)
Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
R Counter (7…0)
Default
‘00000001’
Clock Generator (AD9516-2) Register 0x11 – R Counter – 0xCC (write)
Setting
Bit 0
Description (R Counter)
0
0
14-bit R divider
4.6.1.1.10
Clock Generator (AD9516-2) Register 0x12 – R Counter –
0xD0 (write).
Clock Generator (AD9516-2) Register 0x12 – R Counter – 0xD0 (write)
Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
Reserved
R Counter (13…8)
Default
‘0’
‘0000000’
Clock Generator (AD9516-2) Register 0x12 – R Counter – 0xD0 (write)