Sundance SMT712 - Manual (Page 50)

User Manual SMT712 Page 50 of 89 Last Edited: 11/12/2012 10:36:00
4.6.1.1.22 Clock Generator (AD9516-2) Register 0x1F – PLL
Readback – 0x104 (write).
Clock Generator (AD9516-2) Register 0x1F – PLL Readback – 0x104 (write)
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Reserved VCO Cal
finished Holdover
Active
REF2
Selected
VCO
Frequency
Threshold
REF2
Frequency
Threshold
REF1
Frequency
threshold
Digital
Lock
Detect
Default ‘0’ ‘0’ ‘0’ ‘1’ ‘1’ ‘0’ ‘0’ ‘0’
Clock Generator (AD9516-2) Register 0x1F – PLL Readback – 0x104 (write)
Setting Bit 6 Description (VCO Cal finished)
0 0 VCO calibration not finished.
1 1 VCO calibration finished.
Setting Bit 5 Description (Holdover Active)
0 0 not in holdover.
1 1 holdover state active.
Setting Bit 4 Description (REF2 Selected)
0 0 REF1 selected (or differential reference if in differential mode).
1 1 REF2 selected.
Setting Bit 3 Description (VCO Frequency Threshold)
0 0 VCO frequency is less than the threshold.
1 1 VCO frequency is greater than the threshold.
Setting Bit 2 Description (REF2 Frequency Threshold)
0 0 REF2 frequency is less than threshold frequency.
1 1 REF2 frequency is greater than threshold frequency.
Setting Bit 1 Description (REF1 Frequency Threshold)
0 0 REF1 frequency is less than threshold frequency.
1 1 REF1 frequency is greater than threshold frequency.
Setting Bit 0 Description (Digital Lock Detect)
0 0 PLL is not locked.
1 1 PLL is locked.
4.6.1.1.23 Clock Generator (AD9516-2) Register 0xA0 – OUT6 Delay
Bypass – 0x108 (write).
Clock Generator (AD9516-2) Register 0xA0 – Out6 Delay Bypass – 0x108 (write)
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0
Reserved
OUT6
Delay
Bypass
Default ‘0000000’ ‘1’