Artesyn ATCA-8330 Installation and Use (April 2015) - Manual (Page 172)

Intelligent Peripheral Management Controller
ATCA-8330 Installation and Use (6806800S82B) 172
When the Failsafe logic is triggered as a result of the BMC Watchdog timeout, a System
Firmware Progress event is logged as follows:
 Sensor Type: 0x0F (System Firmware Progress)
 Event Reading Type Code: 0x6F (Sensor Specific)
 Event Data Byte 1: 0xA1 (System Firmware Hang)
 Event Data Byte 2: 0x00 (CPU instance)
 Event Data Byte 3: 0xXX (Failed Boot Bank ID: 0=Bank A; 1=Bank B)
The Failsafe logic will make three attempts to boot the payload successfully and before each
attempt, the Failsafe logic will swap the BIOS boot bank. After three attempts, the Failsafe logic
is automatically aborted. The following example shows the behavior in case of both BIOS
flashes are corrupted and the IPMI Fail Safe is enabled:
1. BIOS try to start from Boot Bank A
 BIOS cannot start and IPMC WDT expired
 IPMC swap BIOS boot bank to B
 Increment Fail Safe counter (1)
2. BIOS try to start from Boot Bank B.
 BIOS cannot start and IPMC WDT expired
 IPMC swap BIOS boot bank to A
 Increment Fail Safe counter (2)
3. BIOS try to start from Boot Bank A
 BIOS cannot start and IPMC WDT expired
 IPMC swap BIOS boot bank to B
 Increment Fail Safe counter (3)
4. BIOS try to start from Boot Bank B
 BIOS cannot start and IPMC WDT expired
 Aborting FAIL SAFE Mechanism, maximum retries (= 3) are reached
Payload software is able to detect when failsafe was activated during last boot via Get Feature
Configuration Command