Artesyn ATCA-8330 Installation and Use (April 2015) - Manual (Page 170)

Intelligent Peripheral Management Controller
ATCA-8330 Installation and Use (6806800S82B) 170
Provided the payload application has registered to these commands via OpenIPMI library. It
gets informed and can take all necessary actions before the payload is gracefully
rebooted/shut-down.
7.8 Fail Safe Logic and Watchdog Support
The IPMC firmware supports automatic fail safe logic for the payload firmware on the blade.
When the IPMC transitions to M4 (Active), the IPMC automatically enables the BMC Watchdog
with the following settings:
Timer Use: BIOS/FBR2
Timer Actions: Power Cycle
Timer Countdown Value: 45 Seconds
Failsafe is a mechanism, implementing automatic BIOS boot bank crisis recovery. It observes
the BIOS boot phase to reset the processor and to swap the BIOS boot banks in case of the boot
firmware hangs accidentally.
Failsafe can be enabled or disabled at any time either:
 The use of an IPMI OEM command called Set/Get Feature Configuration parameter #224.
For details, see Set Feature Configuration Commands.
 BIOS setup menu
Graceful Reboot and Graceful Shutdown is also communicated to the Intel CPU via internal
communication channel.