Artesyn ATCA-8330 Installation and Use (April 2015) - Manual (Page 111)

Functional Description
ATCA-8330 Installation and Use (6806800S82B) 111
5.4.4.1 Power Safety Circuit
Pin 235 of the DIMM is pulled high to management power with a weak pull-up on the DSP-
Dimm-Module.
On the base board, this signal is connected to all DIMMs and to the DSP-FPGA. Whenever a
Memory-DIMM is plugged into a slot, this signal will be pulled down to GND and the DSP-FPGA
will not switch on the DSPs.
5.4.5 IPMC Interface
Each DSP module contains an EEPROM to storage FRU information and a current sense
monitor. Modules 0-4 are connected to the private I2C, modules 5-9 are connected to the SM-
BUS I2C. Address strapping is done on the base board (similar to DIMM-SPDs). Integrated SPD-
Devices are used to store the FRU-information and measure the temperature.
5.4.6 DSP-JTAG Interface
The JTAG interface is buffered 10x on the baseboard and routed one to each DSP-DIMM.
5.4.7 Module Debug Interface
The default Ethernet network is used as the control path between the CPU and each DSP on the
module. In case of a DSP crash, the access via Ethernet is not possible. For debugging purposes,
each DSP is accessible for the vendor specific Opus Studio development suite.
Table 5-4 IPMC Devices
Device Description Address DIMMs
DIMM SPD Device FRU information 0xA6 DIMM 0, 5
DIMM SPD Device FRU information 0xA8 DIMM 1, 6
DIMM SPD Device FRU information 0xAA DIMM 2, 7
DIMM SPD Device FRU information 0xAC DIMM 3, 8
DIMM SPD Device FRU information 0xAE DIMM 4, 9