Program a device, Implement your design, Set up licensing – Altera RLDRAM II Controller MegaCore Function User Manual
Page 59
Altera Corporation
MegaCore Version 9.1
3–15
November 2009
RLDRAM II Controller MegaCore Function User Guide
Getting Started
1
To achieve a higher frequency, increase the number of
address and command and write data pipeline registers, or
increase the number read data pipeline registers, refer to
step
To view the constraints in the Quartus II Assignment Editor, choose
Assignment Editor
(Assignments menu).
1
If you have “?” characters in the Quartus II Assignment Editor,
the Quartus II software cannot find the entity to which it is
applying the constraints, probably because of a hierarchy
mismatch. Either edit the constraints script, or enter the correct
hierarchy path in the Project Settings tab (refer to step
f
For more information on constraints, refer to
.
Program a
Device
After you have compiled the example design, you can perform gate-level
simulation (refer to
“Simulate the Example Design” on page 3–11
) or
program your targeted Altera device to verify the example design in
hardware.
With Altera's free OpenCore Plus evaluation feature, you can evaluate the
RLDRAM II Controller MegaCore function before you obtain a license.
OpenCore Plus evaluation allows you to generate an IP functional
simulation model, and produce a time-limited programming file.
f
For more information on OpenCore Plus hardware evaluation using the
RLDRAM II Controller MegaCore function, refer to
“OpenCore Plus Time-Out Behavior” on
, and
Implement Your
Design
In the MegaWizard flow, to implement your design based on the example
design, replace the example driver in the example design with your own
logic.
1
A FIFO buffer is not implemented in the core; you must
implement a FIFO buffer.
Set Up Licensing
You need to obtain a license for the MegaCore function only when you are
completely satisfied with its functionality and performance, and want to
take your design to production.