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Pci express and legacy pci subsystem, Pci express errors, Pci express correctable errors – Kontron S5500 SEL Troubleshooting User Manual

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System Event Log Troubleshooting Guide for Intel

®

S5500/S3420 series Server Boards

PCI Express and Legacy PCI subsystem

Revision 1.0

Intel order number G74211-001

63

10. PCI Express and Legacy PCI subsystem

The PCI Express* (PCIe) Specification defines standard error types under the Advanced Error Reporting (AER) capabilities. The BIOS logs
AER events into the SEL.

The Legacy PCI Specification error types are PERR and SERR. These errors are supported and logged into the SEL.

10.1 PCI Express Errors

PCIe error events are either correctable (informational event) or fatal. In both cases information is logged to help identify the source of the PCIe
error and the bus, device, and function is included in the extended data fields. The PCIe devices are mapped in the operating system by bus,
device, and function. Each device is uniquely identified by the bus, device, and function. PCIe device information can be found in the operating
system.

10.1.1

PCI Express Correctable errors

When a PCI Express correctable error is reported to the BIOS SMI handler it will record the error using the following format.

Table 63: PCI Express Correctable Error Sensor Typical Characteristics

Byte

Field

Description

8

9

Generator ID

0033h = BIOS SMI Handler

11

Sensor Type

13h = Critical Interrupt

12

Sensor Number

05h

13

Event Direction and
Event Type

[7] Event direction

0b = Assertion Event

1b = Deassertion Event

[6:0] Event Type = 71h (OEM Specific)