Next steps – Kontron S5500 SEL Troubleshooting User Manual
Page 66

System Event Log Troubleshooting Guide for Intel
®
S5500/S3420 series Server Boards
Memory subsystem
Revision 1.0
Intel order number G74211-001
57
Byte
Field
Description
16
Event Data 3
[7]
– Domain Instance Type
0b: Local memory sparing domain instance. This SEL pertains to a local memory sparing domain that is restricted to memory
sparing pairs within a processor socket only
1b: Global memory sparing domain instance. This SEL pertains to a global memory sparing domain that pertains to memory sparing
between processor sockets.
[6:4]
– Reserved
[3:0]
– 0-based Instance ID of this sparing domain
Table 59: Sparing Redundancy State Sensor Event Trigger Offset
– Next Steps
Event Trigger Offset
Description
Next Steps
Hex
Description
01h
Memory is configured in Spare
Channel Mode, and the memory is
operating in the fully redundant
state, with the spare channel
inactive and available.
System boots with spare
channel mode active, one
entry per processor
Informational event.
00h
Memory is configured in Spare
Channel Mode, and the memory
has lost redundancy and is
operating in the degraded state,
with the spare channel active and
used to replace a failed channel.
Spare channel replaces failing
channel; one SEL entry for
processor with failing memory
to signify loss of redundancy
This event should be accompanied by memory errors indicating the source of the
issue. Troubleshoot accordingly (probably replace affected DIMM).