Kontron S5500 SEL Troubleshooting - Manual (Page 67)

Memory subsystem System Event Log Troubleshooting Guide for Intel® S5500/S3420 series Server Boards
58 Intel order number G74211-001 Revision 1.0
9.2 ECC and Address Parity
1. Memory data errors are logged as correctable or uncorrectable.
2. Uncorrectable errors are fatal.
3. Memory addresses are protected with parity bits and a parity error is logged. This is a fatal error.
9.2.1 Memory Correctable and Uncorrectable ECC Error
ECC errors are divided into Uncorrectable ECC Errors and Correctable ECC Errors. A “Correctable ECC Error” actually represents a threshold
overflow. More Correctable Errors are detected at the memory controller level for a given DIMM within a given timeframe. In both cases, the
error can be narrowed down to particular DIMM(s). The BIOS SMI error handler uses this information to log the data to the BMC SEL and
identify the failing DIMM module.
Table 60: Correctable and Uncorrectable ECC Error Sensor Typical Characteristics
Byte Field Description
8
9
Generator ID 0033h = BIOS SMI Handler
11 Sensor Type 0ch = Memory
12 Sensor Number 02h
13
Event Direction and
Event Type
[7] Event direction
0b = Assertion Event
1b = Deassertion Event
[6:0] Event Type = 6Fh (Sensor Specific)
14 Event Data 1
[7:6] – 10b = OEM code in Event Data 2
[5:4] – 10b = OEM code in Event Data 3
[3:0] – Event Trigger Offset as described in Table 61
15 Event Data 2
[7:2] – Reserved. Set to 0.
[1:0] – The logical rank associated with the failed DDR3 DIMM