Kontron S5500 SEL Troubleshooting - Manual (Page 63)

Memory subsystem System Event Log Troubleshooting Guide for Intel® S5500/S3420 series Server Boards
54 Intel order number G74211-001 Revision 1.0
Table 55: Mirrored Redundancy State Sensor Event Trigger Offset – Next Steps
Event Trigger Offset
Description Next Steps
Hex Description
01h
Memory is configured in Mirrored
Channel Mode, and the memory is
operating in the fully redundant
state.
System boots with mirrored
channel mode active; one
entry per processor.
Informational event.
00h
Memory is configured in Mirrored
Channel Mode, and the memory
has lost redundancy and is
operating in the degraded state. One of the channels in the
mirror pair is taken offline -
loss of mirror - one entry only
for affected processor.
This event should be accompanied by memory errors indicating the source of the
issue. Troubleshoot accordingly (probably replace affected DIMM).
9.1.3 Sparing Configuration Status
This sensor provides the Spare Channel mode RAS Configuration status.
Table 56: Sparing Configuration Status Sensor Typical Characteristics
Byte Field Description
8
9
Generator ID 0001h = BIOS POST
11 Sensor Type 0ch = Memory
12 Sensor Number 13h
13
Event Direction and
Event Type
[7] Event direction
0b = Assertion Event
1b = Deassertion Event
[6:0] Event Type = 09h (digital Discrete)
14 Event Data 1
[7:6] – 10b = OEM code in Event Data 2
[5:4] – 00b = Unspecified Event Data 3
[3:0] – Event Trigger Offset as described in Table 57.
15 Event Data 2 Not used.