Rainbow Electronics ATmega128L User Manual
Features
Table of contents
Document Outline
- Features
- Pin Configurations
- Overview
- About Code Examples
- AVR CPU Core
- AVR ATmega128 Memories
- In-System Reprogrammable Flash Program Memory
- SRAM Data Memory
- EEPROM Data Memory
- I/O Memory
- External Memory Interface
- Overview
- ATmega103 Compatibility
- Using the External Memory Interface
- Address Latch Requirements
- Pull-up and Bus-keeper
- Timing
- XMEM Register Description
- MCU Control Register – MCUCR
- External Memory Control Register A – XMCRA
- External Memory Control Register B – XMCRB
- Using all 64KB Locations of External Memory
- System Clock and Clock Options
- Power Management and Sleep Modes
- System Control and Reset
- Interrupts
- I/O-Ports
- Introduction
- Ports as General Digital I/O
- Alternate Port Functions
- Register Description for I/O Ports
- Port A Data Register – PORTA
- Port A Data Direction Register – DDRA
- Port A Input Pins Address – PINA
- Port B Data Register – PORTB
- Port B Data Direction Register – DDRB
- Port B Input Pins Address – PINB
- Port C Data Register – PORTC
- Port C Data Direction Register – DDRC
- Port C Input Pins Address – PINC
- Port D Data Register – PORTD
- Port D Data Direction Register – DDRD
- Port D Input Pins Address – PIND
- Port E Data Register – PORTE
- Port E Data Direction Register – DDRE
- Port E Input Pins Address – PINE
- Port F Data Register – PORTF
- Port F Data Direction Register – DDRF
- Port F Input Pins Address – PINF
- Port G Data Register – PORTG
- Port G Data Direction Register – DDRG
- Port G Input Pins Address – PING
- External Interrupts
- 8-bit Timer/Counter0 with PWM and Asynchronous Operation
- 16-bit Timer/Counter (Timer/Counter1 and Timer/Counter3)
- Restrictions in ATmega103 Compatibility Mode
- Overview
- Accessing 16-bit Registers
- Timer/Counter Clock Sources
- Counter Unit
- Input Capture Unit
- Output Compare Units
- Compare Match Output Unit
- Modes of Operation
- Timer/Counter Timing Diagrams
- 16-bit Timer/Counter Register Description
- Timer/Counter 1 Control Register A – TCCR1A
- Timer/Counter 3 Control Register A – TCCR3A
- Timer/Counter 1 Control Register B – TCCR1B
- Timer/Counter 3 Control Register B – TCCR3B
- Timer/Counter 1 Control Register C – TCCR1C
- Timer/Counter 3 Control Register C – TCCR3C
- Timer/Counter 1 – TCNT1H and TCNT1L
- Timer/Counter 3 – TCNT3H and TCNT3L
- Output Compare Register 1 A – OCR1AH and OCR1AL
- Output Compare Register 1 B – OCR1BH and OCR1BL
- Output Compare Register 1 C – OCR1CH and OCR1CL
- Output Compare Register 3 A – OCR3AH and OCR3AL
- Output Compare Register 3 B – OCR3BH and OCR3BL
- Output Compare Register 3 C – OCR3CH and OCR3CL
- Input Capture Register 1 – ICR1H and ICR1L
- Input Capture Register 3 – ICR3H and ICR3L
- Timer/Counter Interrupt Mask Register – TIMSK
- Extended Timer/Counter Interrupt Mask Register – ETIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- Extended Timer/Counter Interrupt Flag Register – ETIFR
- Timer/Counter3, Timer/Counter2, and Timer/Counter1 Prescalers
- 8-bit Timer/Counter2 with PWM
- 8-bit Timer/Counter Register Description
- Output Compare Modulator (OCM1C2)
- Serial Peripheral Interface – SPI
- USART
- Features
- Analog Comparator
- Analog to Digital Converter
- JTAG Interface and On-chip Debug System
- Features
- Overview
- Test Access Port – TAP
- TAP Controller
- Using the Boundary- scan Chain
- Using the On-chip Debug System
- On-chip Debug Specific JTAG Instructions
- On-chip Debug Related Register in I/O Memory
- Using the JTAG Programming Capabilities
- Bibliography
- IEEE 1149.1 (JTAG) Boundary-scan
- Features
- System Overview
- Data Registers
- Boundary-scan Specific JTAG Instructions
- Boundary-scan Chain
- ATmega128 Boundary- scan Order
- Boundary-scan Description Language Files
- Boot Loader Support – Read-While-Write Self-Programming
- Boot Loader Features
- Application and Boot Loader Flash Sections
- Read-While-Write and No Read-While-Write Flash Sections
- Boot Loader Lock Bits
- Entering the Boot Loader Program
- Addressing the Flash During Self- Programming
- Self-Programming the Flash
- Performing Page Erase by SPM
- Filling the Temporary Buffer (Page Loading)
- Performing a Page Write
- Using the SPM Interrupt
- Consideration While Updating BLS
- Prevent Reading the RWW Section During Self- Programming
- Setting the Boot Loader Lock Bits by SPM
- EEPROM Write Prevents Writing to SPMCR
- Reading the Fuse and Lock Bits from Software
- Preventing Flash Corruption
- Programming Time for Flash when Using SPM
- Simple Assembly Code Example for a Boot Loader
- ATmega128 Boot Loader Parameters
- Memory Programming
- Program and Data Memory Lock Bits
- Fuse Bits
- Signature Bytes
- Calibration Byte
- Parallel Programming Parameters, Pin Mapping, and Commands
- Parallel Programming
- Enter Programming Mode
- Considerations for Efficient Programming
- Chip Erase
- Programming the Flash
- Programming the EEPROM
- Reading the Flash
- Reading the EEPROM
- Programming the Fuse Low Bits
- Programming the Fuse High Bits
- Programming the Extended Fuse Bits
- Programming the Lock Bits
- Reading the Fuse and Lock Bits
- Reading the Signature Bytes
- Reading the Calibration Byte
- Parallel Programming Characteristics
- Serial Downloading
- Serial Programming Pin Mapping
- Programming Via the JTAG Interface
- Programming Specific JTAG Instructions
- AVR_RESET ($C)
- PROG_ENABLE ($4)
- PROG_COMMANDS ($5)
- PROG_PAGELOAD ($6)
- PROG_PAGEREAD ($7)
- Data Registers
- Reset Register
- Programming Enable Register
- Programming Command Register
- Virtual Flash Page Load Register
- Virtual Flash Page Read Register
- Programming Algorithm
- Entering Programming Mode
- Leaving Programming Mode
- Performing Chip Erase
- Programming the Flash
- Reading the Flash
- Programming the EEPROM
- Reading the EEPROM
- Programming the Fuses
- Programming the Lock Bits
- Reading the Fuses and Lock Bits
- Reading the Signature Bytes
- Reading the Calibration Byte
- Electrical Characteristics
- ATmega128 Typical Characteristics – Preliminary Data
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information