Output compare register 1 a – ocr1ah and ocr1al, Output compare register 1 b – ocr1bh and ocr1bl, Output compare register 1 c – ocr1ch and ocr1cl – Rainbow Electronics ATmega128L User Manual
Page 133: Output compare register 3 a – ocr3ah and ocr3al, Output compare register 3 b – ocr3bh and ocr3bl, Output compare register 3 c – ocr3ch and ocr3cl, Atmega128(l)
133
ATmega128(L)
2467B–09/01
Output Compare Register 1 A
– OCR1AH and OCR1AL
Output Compare Register 1 B
– OCR1BH and OCR1BL
Output Compare Register 1 C
– OCR1CH and OCR1CL
Output Compare Register 3 A
– OCR3AH and OCR3AL
Output Compare Register 3 B
– OCR3BH and OCR3BL
Output Compare Register 3 C
– OCR3CH and OCR3CL
The output compare registers contain a 16-bit value that is continuously compared with
the counter value (TCNTn). A match can be used to generate an output compare inter-
rupt, or to generate a waveform output on the OCnx pin.
The output compare registers are 16 bit in size. To ensure that both the high and low
bytes are written simultaneously when the CPU writes to these registers, the access is
performed using an 8-bit temporary high byte register (TEMP). This temporary register
is shared by all the other 16-bit registers.
See “Accessing 16-bit Registers” on page 109.
Bit
7
6
5
4
3
2
1
0
OCR1A[15:8]
OCR1AH
OCR1A[7:0]
OCR1AL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
OCR1B[15:8]
OCR1BH
OCR1B[7:0]
OCR1BL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
OCR1C[15:8]
OCR1CH
OCR1C[7:0]
OCR1CL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
OCR3A[15:8]
OCR3AH
OCR3A[7:0]
OCR3AL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
OCR3B[15:8]
OCR3BH
OCR3B[7:0]
OCR3BL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
OCR3C[15:8]
OCR3CH
OCR3C[7:0]
OCR3CL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0