NEC PD754144 - Manual (Page 66)

CHAPTER 4 INTERNAL CPU FUNCTION
66 User’s Manual U10676EJ3V0UM
4.4.2 Specifying bank of data memory
A memory bank is specified by a 4-bit memory bank select register (MBS) when bank specification is enabled by
setting a memory bank enable flag (MBE) to 1 (MBS = 0, 4, or 15). When bank specification is disabled (MBS = 0),
bank 0 or 15 is automatically specified depending on the addressing mode selected at that time. The addresses in
the bank are specified by 8-bit immediate data or a register pair.
For the details of memory bank selection and addressing, refer to 3.1 Bank Configuration of Data Memory and
Addressing Mode.
For how to use a specific area of the data memory, refer to the following.
• General-purpose register area .... 4.5 General-Purpose Registers
• Stack area .................................... 4.7 Stack Pointer (SP) and Stack Bank Select Register (SBS)
• EEPROM ...................................... CHAPTER 5 EEPROM
• Peripheral hardware area ........... CHAPTER 6 PERIPHERAL HARDWARE FUNCTION