NEC PD754144 User Manual
Page 174
CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
174
User’s Manual U10676EJ3V0UM
(2) Note on starting timer
Usually, count register Tn and interrupt request flag IRQTn are cleared when the timer is started (bit 3 of TMn
is set to “1”). However, if the timer is in an operation mode, and if IRQTn is set as soon as the timer is started,
IRQTn may not be cleared. This does not pose any problem when IRQTn is used as a vector interrupt. In
an application where IRQTn is being tested, however, IRQTn is not set after the timer has been started and
this poses a problem. Therefore, there is a possibility that the timer could be started as soon as IRQTn is
set to 1, either stop the timer once (by clearing the bit 2 of TMn to “0”), or start the timer two times.
Example
If there is a possibility that timer could be started as soon as IRQTn is set
SEL
MB15
MOV
XA, #0
MOV
TMn, XA
; Stops timer
MOV
XA, #4CH
MOV
TMn, XA
; Restarts
Or,
SEL
MB15
SET1
TMn.3
SET1
TMn.3
; Restarts
Remark n = 0 to 2