NEC PD754144 - Manual (Page 41)

CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
41 User’s Manual U10676EJ3V0UM
(6) Bit manipulation addressing
This addressing mode is used to manipulate the entire memory space in bit units (such as Boolean processing
and bit transfer).
While the 1-bit direct addressing mode can only be used with the instructions that set, reset, or test a bit, this
addressing mode can be used in various ways such as Boolean processing by the AND1, OR1, and XOR1
instructions, and test and reset by the SKTCLR instruction.
Bit manipulation addressing can be implemented in the following three ways, which can be selected depending
on the data memory address to be used.
(a) Specific address bit direct addressing (fmem.bit)
This addressing mode is to manipulate the hardware units that use bit manipulation especially often, such
as I/O ports and interrupt-related flags, regardless of the setting of the memory bank. Therefore, the data
memory addresses to which this addressing mode is applicable are FF0H to FFFH, to which the I/O ports
are mapped, and FB0H to FBFH, to which the interrupt-related hardware units are mapped. The hardware
units in these two data memory areas can be manipulated in bit units at any time in the direct addressing
mode, regardless of the setting of MBS and MBE.
Examples 1. To test the timer 0 interrupt request flag (IRQT0) and, if it is set, clear the flag and reset P63
SKTCLR IRQT0 ; IRQT0 = 1?
BR NO ; NO
CLR1 PORT6.3 ; YES
2. To reset P63 if both P30 and P71 pins are 1
P30
P71
P63
(i) SET1 CY ; CY ← 1
AND1 CY, PORT3.0 ; CY P30
AND1 CY, PORT7.1 ; CY P71
SKT CY ; CY = 1?
BR SETP
CLR1 PORT6.3 ; P63 ← 0
•
•
•
SETP : SET1 PORT6.3 ; P63
← 1
•
•
•
(ii) SKT PORT3.0 ; P30 = 1?
BR SETP
SKT PORT7.1 ; P71 = 1?
BR SETP
CLR1 PORT6.3 ; P63 ← 0
•
•
•
SETP: SET1 PORT6.3 ; P63 ← 1