NEC PD754144 User Manual
Page 150
CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
150
User’s Manual U10676EJ3V0UM
.
.
(3) Application of PWM mode
To output a pulse with a frequency of 38.0 kHz (cycle of 26.3
µs) and a duty factor of 1/3 to the PTO2 pin
Note
•
Set the higher 4 bits of the timer counter mode register (TM2) to 0011B and select 61.0
µs as the longest
set time.
•
Set the lower 4 bits of TM2 to 1101B, and select the PWM mode and count operation, and issue the timer
start command.
•
Set the timer counter output enable flag (TOE2) to “1” to enable timer output.
•
Set the high-level period setting timer counter modulo register (TMOD2H) as follows.
–1 = 36.8 – 1
36 = 24H
•
The set value of the timer counter modulo register (TMOD2) is as follows.
–1 = 73.7 – 1
73 = 49H
SEL
MB15
; or CLR1 MBE
SET1
TOE2
; Enables timer output
MOV
XA, #024H
MOV
TMOD2H, XA
; Sets modulo (high-level period)
MOV
XA, #49H
MOV
TMOD2, XA
; Sets modulo (low-level period)
MOV
XA, #00111101B
MOV
TM2, XA
; Sets mode and starts timer
Note This example applies to the operation of the
µPD754244 at f
X
= 4.19 MHz. With f
X
= 6.0 MHz operation
of the
µPD754244 and f
CC
= 1.0 MHz operation of the
µPD754144, the cycles are different even if the settings
are the same.
2
26.3
µs
3
238 ns
1
26.3
µs
3
238 ns