NEC PD754144 - Manual (Page 47)

CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
47 User’s Manual U10676EJ3V0UM
(1) To use as 4-bit registers
When the general-purpose register area is used as a 4-bit register area, a total of eight general-purpose
registers, X, A, B, C, D, E, H, and L, specified by RBE and RBS can be used as shown in Figure 3-5. Of these
registers, A plays a central role in transferring, operating, and comparing 4-bit data as a 4-bit accumulator.
The other registers can transfer, compare, and increment or decrement data with the accumulator.
(2) To use as 8-bit registers
When the general-purpose register area is used as an 8-bit register area, a total of eight 8-bit register pairs
can be used as shown in Figure 3-6: register pairs XA, BC, DE, and HL of a register bank specified by RBE
and RBS, and register pairs XA’, BC’, DE’, and HL’ of the register bank whose bit 0 is complemented in respect
to the register bank (RB). Of these register pairs, XA serves as an 8-bit accumulator, playing the central role
in transferring, operating, and comparing 8-bit data. The other register pairs can transfer, compare, and
increment or decrement data with the accumulator. The HL register pair is mainly used as a data pointer.
The DE and DL register pairs are also used as auxiliary data pointers.
Examples 1. INCS HL ; Skips if HL
← HL+1, HL=00H
ADDS XA, BC ; Skips if XA
← XA+BC and carry occurs
SUBC DE’, XA ; DE’ ← DE’ – XA – CY
MOV XA, XA’ ; XA ← XA’
MOVT XA, @PCDE ; XA ← (PC
11–8 +DE) ROM, table reference
SKE XA, BC ; Skips if XA = BC
2. To test whether the value of the count register (T0) of timer counter 0 is greater than the value
of register pair BC’ and, if not, to wait until it becomes greater
CLR1 MBE
NO : MOV XA, T0 ; Reads count register
SUBS XA, BC’ ; XA
≥ BC’ ?
BR YES ; YES
BR NO ; NO