NEC PD754144 User Manual
Page 43
CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
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User’s Manual U10676EJ3V0UM
(c) Special 1-bit direct addressing (@H+mem.bit)
This addressing mode enables bit manipulation in the entire memory space.
The higher 4 bits of the data memory address of the memory bank specified by MBE and MBS are indirectly
specified by the H register, and the lower 4 bits and the bit address are directly specified by the operand.
This addressing mode can be used to manipulate the respective bits of the entire data memory area in
various ways.
Example
To reset bit 2 (FLAG3) at address 32H if both bit 3 (FLAG1) at address 30H and bit 0 (FLAG2) at address
31H are 0 or 1
FLAG1
FLAG2
FLAG3
FLAG1
EQU
30H.3
FLAG2
EQU
31H.0
FLAG3
EQU
32H.2
SEL
MB0
MOV
H, #FLAG1 SHR 6
CLR1
CY
;
CY
← 0
OR1
CY, @H+FLAG1
;
CY
← CY FLAG1
XOR1
CY, @H+FLAG2
;
CY
← CY FLAG2
SET1
@H+FLAG3
;
FLAG3
← 1
SKT
CY
;
CY = 1?
CLR1
@H+FLAG3
;
FLAG3
← 0