NEC PD754144 User Manual
Page 167
CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
167
User’s Manual U10676EJ3V0UM
Remark If a timer (channel 1) interrupt is generated when the PTO2 pin is low and the carrier
clock is high (NRZ = 0, carrier clock = high level), the carrier is output to the PTO2 pin
from the pulse after the carrier clock.
If a timer (channel 1) interrupt is generated when the PTO2 pin is high and the carrier
clock is high (NRZ = 1, carrier clock = high level), the PTO2 pin does not become low
until the end of the carrier clock being output.
This processing is performed to keep the width of the high-level pulse output from the
PTO2 pin constant regardless of the NRZ switching timing (see figure below).
Carrier clock
No return zero flag (NRZ)
PTO2 pin
PTO2 does not go high even if NRZ is
set to "1" until the next carrier clock
goes high.
PTO2 does not go low even if NRZ is
reset to "0" until the next carrier clock
goes high.