Artesyn MVME2500 ECC Installation and Use (August 2014) - Manual (Page 89)

Memory Maps and Registers
MVME2500-ECC Installation and Use (6806800N30F) 89
5.4 Programmable Logic Device (PLD) Registers
5.4.1 PLD Revision Register
The MVME2500-ECC provides a PLD revision register that can be read by the system software
to determine the current version of the timers/registers PLD.
PCIE2 CCSR 0xffe09000 0xffe09fff 4 KB
PCIE1CCSR 0xffe0a000 0xffe0afff 4 KB
DMA2 CCSR 0xffe0c100 0xffe0c303 516 B
GPIO CCSR 0xffe0fc00 0xffe0fcff 256 B
L2 Cache CCSR 0xffe20000 0xffe20fff 4 KB
DMA1 CCSR 0xffe21100 0xffe21303 516 B
USB CCSR 0xffe22000 0xffe22fff 4 KB
ETSEC1 CCSR 0xffe24000 0xffe24fff 4 KB
ETSEC2 CCSR 0xffe25000 0xffe25fff 4 KB
ETSEC3 CCSR 0xffe26000 0xffe26fff 4 KB
SDHCI CCSR 0xffe2e000 0xffe2efff 4 KB
Crypto CCSR 0xffe30000 0xffe3ffff 64 KB
msi CCSR 0xffe41600 0xffe4167f 128 B
mpic CCSR 0xffe40000 0xffe7ffff 256 KB
Global Utilities CCSR 0xffee0000 0xffee0fff 4 KB
L2 Cache Mem 0xf0f80000 0xf0ffffff 512 KB
Table 5-2 Linux Devices Memory Map (continued)
Device Memory Range Memory Area Size
Table 5-3 PLD Revision Register
REG PLD Revision Register - 0xFFDF0000
Bit 7 6 5 4 3 2 1 0