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Cpri v6.0 ip core self-synchronization feature, Cpri v6.0 ip core self-synchronization feature -50 – Altera CPRI v6.0 MegaCore Function User Manual

Page 80

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Table 3-29: Loopback Modes

Tag in Figure

Description

How to Configure

1

External loopback: Use this configuration

to test the full Tx and Rx paths from an

application through the CPRI link and

back to the application.

Connect a CPRI REC master's CPRI Tx interface

to its CPRI Rx interface by physically connecting

the CPRI v6.0 IP core's high-speed transceiver

output pins to its high-speed transceiver input

pins.
The connection medium must support the data

rate requirements of the CPRI v6.0 IP core.

2

Transceiver PMA serial forward loopback

path is active.

Turn on Enable transceiver PMA forward

loopback path (Tx to Rx) in the parameter editor

and set the

loop_forward

field of the

LOOPBACK

register to the value 2'b01.

3

Active parallel loopback path does not

exercise the transceiver.

Turn on Enable forward loopback path (Tx to

Rx) in the parameter editor and set the

loop_

forward

field of the

LOOPBACK

register to the value

2'b10 (to include the stitching logic to the

transceiver) or 2'b11 (to exclude the stitching

logic to the transceiver).

4

Reverse loopback path is active.

Turn on Enable reversed loopback path (Rx to

Tx) in the parameter editor and set the

loop_

reversed

field of the

LOOPBACK

register to a non-

zero value. The register value specifies the parts of

the CPRI frame that participate in the loopback

path. Other parts of the CPRI frame are filled in

from the local IP core.

Related Information

LOOPBACK Register

on page 5-14

CPRI v6.0 IP Core Self-Synchronization Feature

Altera provides a self-synchronization testing feature that supports an RE slave in a CPRI link external

loopback configuration. This feature is intended to work correctly only for Layer 1 testing.
By default, only an REC master can function correctly in a CPRI link external loopback configuration. An

RE slave in external loopback configuration cannot achieve frame synchronization, because the CPRI RX

interface must lock on to the K28.5 character before the CPRI TX interface can begin sending K28.5

characters. Therefore, no K28.5 character is ever transmitted on the RE slave loopback CPRI link.
However, in an Altera RE slave CPRI v6.0 IP core you can specify that the CPRI TX interface begin

sending K28.5 characters before the CPRI Rx interface locks on to the K28.5 character from the CPRI link.

This feature supports a CPRI RE slave in achieving frame synchronization without being connected to a

CPRI master, and allows you to test your CPRI RE slave without the need for an additional CPRI v6.0 IP

core.
To turn on this feature, connect your CPRI RE slave in a CPRI link external loopback configuration, and

set the

tx_enable_force

field of the

L1_CONFIG

register to the value of 1.

3-50

CPRI v6.0 IP Core Self-Synchronization Feature

UG-01156

2014.08.18

Altera Corporation

Functional Description

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