Altera Floating-Point - Manual (Page 94)

Table 12-2: Truth Table for Natural Logarithm Operations
DATA[] SIGN BIT RESULT[] Zero NaN
Normal 0 Normal 0 0
Normal 1 NaN (6) 0 1
1 (7) 0 Zero 1 0
Denormal (8) 0 Negative Infinity 0 0
Zero (9) 0/1 Negative Infinity 0 0
Infinity 0 Positive Infinity 1 0
NaN X NaN 0 1
ALTFP_LOG Resource Utilization and Performance
This table lists the resource utilization and performance information for the ALTFP_LOG IP core. The
information was derived using the Quartus II software version 10.0.
Table 12-3: ALTFP_LOG Resource Utilization and Performance for Stratix IV Devices
Device Family Precision
Output
Latency
Logic usage
f
MAX
(MHz)
Adaptive
Look-Up
Tables
(ALUTs)
Dedicated
Logic
Registers
(DLRs)
Adaptive
Logic
Modules
(ALMs)
18-Bit DSP
Stratix IV
Single 21 1,950 1,864 1,378 8 385
Double 34 5,451 6,031 4,151 64 211
ALTFP_LOG Design Example: Natural Logarithm of Single-Precision
Format Numbers
This design example uses the ALTFP_LOG IP core to compute the natural logarithm of single-precision
format numbers. This example uses the parameter editor GUI to define the core.
(6) The natural logarithm of a negative value is invalid. Therefore, the output produced is a NaN.
(7) The “1” in this case is equivalent to In 1.
(8) The value of positive denormalized numbers is a value that approximates zero, and the output produced is a
negative infinity number.
(9) The zero in this case represents zero special case of the IEEE standard. It is not equivalent to In 0, but
instead approximates to it.
12-2 ALTFP_LOG Resource Utilization and Performance
UG-01058
2014.12.19
Altera Corporation ALTFP_LOG
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