Altera Floating-Point User Manual
Page 136
Family
Function
Precision Latency
f
MAX
ALMs
M10K M20
K
DSP
Blocks
Logic Registers
Primary Secondary
Arria 10
(10AX115H4
F34I3SP)
Log base 2
Single
14
275.79
316
--
3
3
402
3
Double
32
271.96
1,173
--
8
16
2,372
132
Log base e
Single
29
378.07
297
--
3
9
315
6
Double
29
256.54
1,219
--
20
13
2,338
152
Multiply
Single
3
288.4
49
--
0
1
0
0
Double
5
288.35
312
--
0
4
236
26
Power
Single
40
262.12
1,335
--
8
14
1,523
127
Double
73
237.7
3,957
--
13
37
5,362
305
Square
Root
Single
8
432.9
124
--
3
2
118
8
Double
22
249.25
539
--
8
9
1,000
34
Subtract
Single
4
296.9
49
--
0
1
0
0
Double
7
296.82
842
--
0
0
783
76
UG-01058
2014.12.19
ALTERA_FP_FUNCTIONS Resource Utilization and Performance
18-9
ALTERA_FP_FUNCTIONS IP Core
Altera Corporation
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