Altfp_inv ip core, Altfp_inv features, Output latency – Altera Floating-Point User Manual
Page 81: Altfp_inv truth table, Altfp_inv ip core -1, Altfp_inv features -1, Output latency -1, Altfp_inv truth table -1
ALTFP_INV IP Core
10
2014.12.19
UG-01058
You can use the ports and parameters available to customize the ALTFP_INV IP core according to your
application.
ALTFP_INV Features
The ALTFP_INV IP core offers the following features:
• Inverse value of a given input.
• Optional exception handling output ports such as
zero
,
division_by_zero
,
underflow
, and
nan
.
Output Latency
The output latency options for the ALTFP_INV megafunction differs depending on the precision
selected, the width of the mantissa, or both.
Precision
Mantissa Width
Latency (in clock cycles)
Single
23
20
Double
52
27
Single Extended
31 – 39
20
40 – 52
27
ALTFP_INV Truth Table
Table 10-1: Truth Table for Inverse Operations
DATA[]
SIGN BIT
RESULT[]
Underflow
Zero
Division_by_
zero
NaN
Normal
0/1
Normal
0
0
0
0
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