5 power-fail warning interrupt, 6 simulated interrupts, Ower – Maxim Integrated Secure Microcontroller User Manual
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Secure Microcontroller User’s Guide
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11.5 Power-Fail Warning Interrupt
The secure microcontroller family adds a new interrupt, the early warning power-fail interrupt (PFW), to
the standard 8051 collection. During a power-down or brown out, as V
CC
is falling, the secure
microcontroller can generate an early warning power-fail interrupt. This allows the software to save
critical data prior to entering a reset condition. Since the NV RAM is not affected by a reset, this data is
effectively saved. Software can use the PFW to save the current routine, current data, shut off external
functions, or simply to enter a known region of memory for the power-down. It is used in conjunction
with the power monitor and nonvolatile memory.
Setting the EPFW bit at PCON.3 to logic 1 enables PFW. The PFW flag is located at PCON.5. Whenever
V
CC
drops below the V
PFW
voltage threshold, the PFW flag is set to logic 1. This flag is cleared when read
by software. If the voltage is still below the V
PFW
, the flag will again be set immediately. This occurs
regardless of whether the interrupt is enabled. The V
PFW
voltage is different for each member of the
secure microcontroller family. Check the electrical specifications for details. Note that the EA global-
enable bit does not control the PFW interrupt. It can only be enabled or disabled using the EPFW bit.
11.6 Simulated Interrupts
Except for PFW, any interrupt can be forced by setting the corresponding flag to logic 1 in software. This
causes the code to jump to the appropriate interrupt vector. Clearing the appropriate flag manually will
clear a pending interrupt. Note that the PFW flag cannot be written by software.