Maxim Integrated Secure Microcontroller - Manual (Page 85)

Secure Microcontroller User’s Guide
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10. RESET CONDITIONS
10.1 Reset Sources
The secure microcontroller family provides proper reset operation with a minimum of external circuitry.
In fact, for many applications, external reset circuitry is not required. The possible sources of reset are:
a) Power-on (operating voltage applied to V
CC
)
b) No-V
LI
power-on
c) External RST pin
d) Watchdog timeout
Certain actions are taken in all cases where a reset has been issued. Whenever any type of reset is
executed, the ALE and PSEN quasi-bidirectional pins are configured as inputs. In addition, an internal
reset line (IRST) is active continuously until the condition that is causing the reset has been removed.
SFRs are initialized during reset as shown in
Table 10-A . Reset Status Bits contains a summary of the bits
that indicate the source of the most recent reset.
Reset Status Bits
PCON.6 POR
Power-On Reset Indicates that the previous reset was initiated during a power-on.
Initialization: Cleared to 0 whenever a power-on reset occurs; remains unchanged on
other types of resets. Must be set to 1 by software.
Read Access: Can be read normally anytime.
Write Access: Can be written only by using the timed-access register.
PCON.4
WTR
Watchdog Timer Reset Set to 1 when a timeout condition of the watchdog timer occurs. Cleared
to 0 immediately following a read operation.
Initialization: Set to 1 on a watchdog timeout reset. Remains unchanged on any other
type of reset.
Read Access: Read normally anytime.
Write Access: Not writable.
PCON.2
EWT
Enable Watchdog Timer The watchdog timer is enabled if EWT = 1 and is disabled if EWT = 0.
This is not technically a status bit but can indicate a no-V
LI
reset condition.
Initialization: Cleared to 0 on a no-V
LI
power-on reset. Remains unchanged during other
types of reset.
Read Access: May be read normally anytime.
Write Access: Writeable only by using the timed-access register.