Maxim Integrated Secure Microcontroller - Manual (Page 106)

Secure Microcontroller User’s Guide
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12.5 RPC Interrupts
RPC mode provides an additional interrupt to the standard secure microcontroller set. An input buffer-full
interrupt (IBF) will be performed (if enabled) when data is written to the DBBIN from a host. When
enabled, this interrupt replaces the Timer 1 interrupt (vector location 1BH). Regardless of whether this
interrupt is enabled, future writes are locked out of the secure microprocessor until the DBBIN is ready.
The device provides two outputs to interrupt the host system as needed. These are output buffer full
(OBF) and input buffer empty (
IBF ).
RPC Status Register—Status (0DAH)
ST7 ST6 ST5 ST4 IAO FO IBF OBF
RPS.7-4:
General purpose status bits that can be written by the DS5001/2 and can be read by
the external host.
Initialization:
Cleared when RPCON=0.
Read Access:
Can be read by the DS5001/2 and host CPU when RPC mode is invoked.
Write Access:
Can be written by the DS5001/2 when RPC mode is invoked.
RPS.3:
IA0
Stores the value of the external system A0 for the last DBBIN Write when a valid
write occurs (as determined by the IBF flag).
Initialization:
Cleared when RPC=0.
Read Access:
Can be read by the DS5001/2 and host CPU when in RPC mode.
Write Access:
Automatically written when a valid DBBIN Write occurs. Cannot be written
otherwise.
RPS.2:
F0
General purpose flag written by the DS5001/2 and read by the external host.
Initialization:
Cleared when RPC=0.
Read Access:
Can be read by the DS5001/2 and host CPU when in RPC mode.
Write Access:
Can be written by the DS5001/2 when in RPC mode.
RPS.1:
IBF
Input Buffer Full Flag is set following a write by the external host, and is cleared
following a read of the DBBIN by the DS5001/2.
Initialization:
Cleared when RPC=0.
Read Access:
Can be read by the DS5001/2 and host CPU when in RPC mode.
Write Access:
Written automatically as part of the RPC communication. Cannot be set by the
application software.