Maxim Integrated Secure Microcontroller - Manual (Page 165)

Secure Microcontroller User’s Guide
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The time, calendar, and alarm functions are controlled by these 14 registers. In particular, the command
register controls most functions. There are two additional bits in register 09h that deserve mention. Bit 7
is
EOSC , which enables the Timekeeping oscillator if set to a 0. Battery lifetime can be preserved by
disabling the oscillator when it is not needed and power is not present. Note the user’s software should
enable the oscillator, as it should be off for shipping. If the oscillator is off, a user can read or write to the
Timekeeping register, but the time value will not change. Setting the
ESQW bit (bit 6) of the same register
will cause the DS2251T to output a 1024 Hz SQW signal output on pin 70. When disabled, it is tri-state
so it will not interfere with other uses of a port pin.
DS2251T/DS2252T RTC Command Register
RTC COMMAND Register Address 0BH
TE IPSW IBH/L0 PU/LVL WAM TDM WAF TDF
CMD.7
TE
Transfer Enable To avoid updating of time registers while a read is taking place, the update may be
frozen. Setting the TE = 0 prevents the RTC from updating the user-readable time of
day registers. Setting TE = 1 will enable updates every 0.01 seconds.
CMD.6
IPSW
Interrupt Switch When IPSW = 1, INTP will be assigned to time of day alarm and INTB will be
assigned to the periodic timeout. When IPSW=0, the functions are reversed.
CMD.5
IBHL
INTB H/L When set to logic 1, the INTB will source current (active high). When set to a logic 0,
INTB will sink current (active low).
CMD.4
PU/LVL
Pulse/Level When set to a logic 1, INTP will sink current for approximately 3ms when it is
activated. INTB sinks or sources (as set by IBLH) for 3ms. When set to a logic 0, the
interrupt pins will signal with a continuous level.
CMD.3
WAM
Watchdog Alarm Mask When WAM = 1, the watchdog countdown timer interrupt will be disabled. When
WAM = 0, the countdown interrupt is enabled.
CMD.2
TDM
Time of Day When set to a logic 1, the time of day interrupt is disabled. When set to an alarm mask
logic 0, the time of day alarm is enabled.
CMD.1
WAF
Watchdog This bit is set to 1 by the RTC when a watchdog timeout alarm flag occurs. WAF is
reset by reading or writing either of the countdown registers.
CMD.0
TDF
Time-of-Day Alarm Flag This bit is set to 1 by the RTC when a time-of-day alarm occurs. It is cleared by
reading or writing any time-of-day alarm register (register 3, 5, or 7).