Maxim Integrated Secure Microcontroller - Manual (Page 166)

Secure Microcontroller User’s Guide
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17.7 DS2251T/DS2252T RTC Interrupts
The DS2252T/DS2252T RTC provides two interrupt functions. They are time-of-day alarm and a
watchdog alarm. The watchdog alarm is a user programmed periodic interval time-out. It is programmed
using registers 0Ch and 0Dh. The time-of-day alarm is controlled by the registers at locations 03h, 05h,
and 07h as well as the command register. The alarm registers relate to similar time registers. The alarm
works by matching the time to the selected alarm according to the mask bits. These are the MSBs of the
respective alarm registers. The mask determines if that register is used in the alarm match or is a don’t
care.
Table 17-A. Alarm Mask Bit Operation
MASK
ALARM CONDITION
Minutes Hours Days
1 1 1 Alarm once per minute.
0 1 1 Alarm when minutes match time.
0 0 1 Alarm when minutes and hours match time.
0 0 0 Alarm when minutes, hours, and days match time.
Note: Other mask bit combinations produce invalid operations and should be avoided.
The RTC provides three interrupt outputs called
INTA , INTB , and INTP . INTP is an open-drain
representation of INTA that can also be forced active. Either INTA or INTB can be assigned to either
interrupt function. That is, INTA can be the time-of-day alarm or the time-out interval alarm. When INTA
serves as one function, INTB is automatically the other. INTP always tracks with INTA . This allows the
RTC interrupts to use only one interrupt pin on the microprocessor if the interrupts will not be used
simultaneously. In the DS2251T, all three interrupt pins are available at the connector. The user connects
these to the microprocessor port pins of choice. In the DS2252T, only
INTP is available and is connected
to P3.2 ( INT0 ). INTP is an open-drain signal, and will pull P3.2 low.
Important DS2251T/DS2252T RTC Application Note
Under certain conditions the RTC alarm can be active following the application of V
CC
to the module.
While this is normal operation of the device, the system designer must be sure to allow for the RTC
interrupt to be active following a module power-on reset. This can occur in one of two situations. The
first is if the RTC was intentionally enabled, and an RTC alarm occurred while V
CC
was removed. In this
case, the alarm will be seen to be active during the power-on reset routine. Common software practice is
to blindly enable all interrupts early in the application software. Because the RTC interrupt may already
be pending, it is important that the RTC be fully initialized before enabling interrupts. This also means
that the system hardware should tolerate the appropriate interrupt pins on either the microprocessor or
RTC being active on power-up.
The second cause of an unintentional RTC alarm assertion is related to the first time power is applied to a
device, breaking its freshness seal. The freshness seal is a low-power mode that removes battery power
from the internal SRAM and RTC during extended storage periods. All Maxim microcontroller modules
are shipped from the factory with the internal freshness seal enabled to prevent battery drain while in
storage. The freshness seal is automatically removed upon first application of V
CC
.
When the freshness seal is broken, all bits inside the RTC are indeterminate. This could result in the
alarm bits being set, and an alarm interrupt asserted on the appropriate pin, when V
CC
is applied. Users of