Maxim Integrated Secure Microcontroller - Manual (Page 13)

Secure Microcontroller User’s Guide
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3. SECURE MICROCONTROLLER ARCHITECTURE
The secure microcontroller family is based on an 8051-compatible core with a memory interface and I/O
logic build around it. In general, most architecture features are identical to standard 8051s and apply to all
members of the secure microcontroller family. Differences between versions are mentioned. This section
briefly documents the important features.
Figure 3-1 shows a block diagram of the microcontroller core.
Users interested in a more thorough explanation of the 8051 architecture are referred to any of the
numerous texts on the subject.
3.1 Bus Organization
There are four major buses in the secure microprocessor: the internal data bus, the internal address bus,
the bytewide memory bus, and the expanded bus. All addresses and data that are transferred during
program execution are passed on the internal address and data buses. User program and data memory is
always accessed from either the bytewide program/data RAM or from external memory located on the
expanded bus. The bytewide memory bus allows access to program/data RAM in the same way as an
8051 family device would access internal ROM or EPROM memory. This bus can be used in place of the
expanded bus, freeing Port 2 and Port 0 pins for general I/O use.
3.2 CPU Registers
The CPU registers are mapped as special function registers (SFRs). They are identical in number and
function to those present within the 8051. These registers are described briefly:
Accumulator
The accumulator (A or ACC) is used as either a source and/or destination register in all arithmetic
instructions. It may also be used in most other types of instructions.
Stack Pointer
The stack pointer (SP) is an 8-bit register that marks the location of the last byte of data stored in the
stack. The stack itself can be located anywhere in the on-chip 128-byte scratchpad register area. The stack
pointer pre-increments during a stack push and post-decrements during a stack pop.
B Register
The major function of the B register is as a source and destination register during multiply and divide
instructions. It can also be used as a scratchpad register.
Program Status Word
The program status word (PSW) contains status flags that are set according to the results of a previously
executed instruction. In addition, the PSW contains register bank select bits.
Data Pointer
The data pointer (DPTR) is used to access data memory that can be mapped into bytewide data RAM or
onto external memory devices on the expanded bus. The DPTR is accessed by the user’s program as
either two 8-bit SFRs or as a 16-bit register with certain instructions.