IEI Integration ICE-DB-T6 - Manual (Page 6)

Type 6 Carrier Board Design Guide
Page VI
3.9.1 Signal Description ........................................................................................... 53
3.9.2 Giga LAN Connector ....................................................................................... 54
3.9.3 LAN Link Activity and Speed LED................................................................... 55
3.9.4 LAN Routing Guideline.................................................................................... 55
3.9.4.1 Impedance ................................................................................................. 55
3.9.4.2 LAN Ground Plane Separation ................................................................. 56
3.10 LPC (L OW P IN C OUNT I NTERFACE ) ....................................................................... 56
3.10.1 Signal Description ......................................................................................... 56
3.10.2 LPC Super IO for Legacy IO Support............................................................ 57
3.10.2.1 Keyboard/Mouse..................................................................................... 58
3.10.2.2 RS-232 .................................................................................................... 59
3.11 VGA ...................................................................................................................... 59
3.11.1 Signal Description.......................................................................................... 60
3.11.2 VGA Connector .............................................................................................. 60
3.11.3 VGA DAC Filter............................................................................................. 60
3.11.4 Routing Guide Line ........................................................................................ 61
3.11.4.1 HSYNC and VSYNC Signals ................................................................. 61
3.11.4.2 ESD ......................................................................................................... 61
3.11.4.3 DDC Interface ......................................................................................... 61
3.11.5 VGA Reference Design .................................................................................. 61
3.12 M ISCELLANEOUS .................................................................................................... 62
3.12.1 Signal Description ......................................................................................... 62
3.12.2 Speaker/FAN Control/RTC Reference ............................................................ 64
3.12.2.1 Speaker Out............................................................................................. 64
3.12.2.2 RTC ......................................................................................................... 64
3.12.2.3 Fan Control ............................................................................................. 65
4 PCB STACK AND POWER DELIVER DESIGN ................................................. 66
4.1 C HAPTER O VERVIEW ................................................................................................ 67
4.2 M ICROSTRIP OR S TRIPLINE ....................................................................................... 67
4.3 PCB S TACKUP E XAMPLE ......................................................................................... 67
4.3.1 Four-Layer Stack-up ........................................................................................ 68
4.3.2 Six-Layer Stack-up ........................................................................................... 68
4.4 ATX P OWER D ELIVERY G UIDELINES ........................................................................ 70
4.4.1 ATX Power States (S0, S3, S4, S5, G3)............................................................ 71