Teledyne LeCroy PXA125 - Manual (Page 23)

User Manual PXA125
Portrayal 1-9
i.e., the generator is gated when the logic level is high and idle when
the level is logic low. Trigger level for this input is TTL.
The same input is used in FSK mode, where the output hops be-
tween two frequencies – carrier and shifted frequencies. The output
generates carrier frequency when the FSK input is false and shifted
frequency when the FSK input is true.
The trigger input is also used as stop and start input when the
PXA125 is placed in Arm mode.
SINE OUT
This SMB connector outputs dc coupled, fixed level (1 V
pk-pk
into
50 Ω ) sine waveforms. This output is derived directly from the sample
clock generator and is active at all times, regardless of present
operating mode of the PXA125. The frequency of the sine output is
programmed using the sample clock parameter. Frequency agility
and modulation affect this output directly. The sine waveform output
is programmed to 125 MHz, so it may serve as an additional output to
those available on the front panel.
REF IN
This SMB connector accepts 10 MHz, TTL level reference signal. The
external reference input is available for those applications requiring
better accuracy and stability reference than the one provided inside
the PXA125. The reference input is active only after selecting the
external reference source mode.
Operating Modes
The PXA125 can be programmed to operate in one of four operating
modes: continuous, triggered, gated and (counted) burst. These
modes are described below.
Continuous Mode
In normal continuous mode, the selected waveform is generated
continuously at the selected frequency, amplitude and offset.