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Figure 68 – Rainbow Electronics AT89C5132 User Manual

Page 94

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94

AT8xC5132

4173A–8051–08/02

Figure 68. Data Block Transmission Flows

Data Receiver

Configuration

To receive data from the card, the user must first configure the data controller in recep-
tion mode by clearing the DATDIR bit in MMCON1 register.

Figure 69 summarizes the data stream reception flows in both polling and interrupt
modes while Figure 70 summarizes the data block reception flows in both polling and
interrupt modes, these flows assume that block length is greater than 16 Bytes.

Data Reception

The end of data frame (block or stream) reception is signalled by the EOFI flag in
MMINT register. This flag may generate an MMC interrupt request as detailed in Section
"Interrupt", page 97. W
hen this flag is set, two other flags in MMSTA register: DATFS
and CRC16S give a status on the frame received. DATFS indicates if the frame format
is correct or not: a valid End bit has been received, and CRC16S indicates if the CRC16
computation is correct or not. In case of data stream CRC16S has no meaning and
stays cleared.

According to the MMC specification data transmission, the card starts after the access
time delay (formally N

AC

parameter) beginning from the End bit of the read command.

To avoid any locking of the MMC controller when card does not send its data (e.g. phys-
ically removed from the bus), the user must launch a time-out period to exit from such
situation. In case of time-out the user may reset the data controller and its internal state
machine by setting and clearing the DCR bit in MMCON2 register.

Data Block

Transmission

Start Transmission

DATEN = 1
DATEN = 0

FIFO Empty?

F1EI or F2EI = 1?

FIFO Filling

Write 8 Data to MMDAT

No More Data

To Send?

FIFOs Filling

Write 16 Data to MMDAT

a. Polling Mode

Data Block

Initialization

Start Transmission

DATEN = 1
DATEN = 0

FIFOs Filling

Write 16 Data to MMDAT

Data Block

Transmission ISR

FIFO Filling

Write 8 Data to MMDAT

No More Data

to Send?

b. Interrupt Mode

FIFO Empty?

F1EI or F2EI = 1?

Mask FIFOs Empty

F1EM = 1
F2EM = 1

Unmask FIFOs Empty

F1EM = 0
F2EM = 0