Ee table 69); a, Table 70); an, Table 71) – Rainbow Electronics AT89C5132 User Manual
Page 67
67
AT8xC5132
4173A–8051–08/02
Table 69. AUDSTA Register
AUDSTA (S:9Ch Read Only) – Audio Interface Status Register
Reset Value = 1100 0000b
Table 70. AUDDAT Register
AUDDAT (S:9Dh) – Audio Interface Data Register
Reset Value = 1111 1111b
Table 71. AUDCLK Register
AUDCLK (S:ECh) – Audio Clock Divider Register
Reset Value = 0000 0000b
7
6
5
4
3
2
1
0
SREQ
UDRN
AUBUSY
-
-
-
-
-
Bit
Number
Bit
Mnemonic
Description
7
SREQ
Audio Sample Request Flag
Set in C51 audio source mode when the audio interface request samples (buffer
half empty). This bit generates an interrupt if not masked and if enabled in IEN0.
Cleared by hardware when samples are loaded in AUDDAT.
6
UDRN
Audio Sample Under-run Flag
Set in C51 audio source mode when the audio interface runs out of samples
(buffer empty). This bit generates an interrupt if not masked and if enabled in
IEN0.
Cleared by hardware when samples are loaded in AUDDAT.
5
AUBUSY
Audio Interface Busy Bit
Set in C51 audio source mode when the audio interface cannot accept more
sample (buffer full).
Cleared by hardware when buffer is no more full.
4-0
-
Reserved
The values read from these Bits are always 0. Do not set these Bits.
7
6
5
4
3
2
1
0
AUD7
AUD6
AUD5
AUD4
AUD3
AUD2
AUD1
AUD0
Bit
Number
Bit
Mnemonic
Description
7 - 0
AUD7:0
Audio Data
8-bit sampling data for voice or sound playing.
7
6
5
4
3
2
1
0
-
-
-
AUCD4
AUCD3
AUCD2
AUCD1
AUCD0
Bit
Number
Bit
Mnemonic
Description
7 - 5
-
Reserved
The values read from these Bits are always 0. Do not set these Bits.
4 - 0
AUCD4:0
Audio Clock Divider
5-bit divider for audio clock generation.