Rainbow Electronics AT89C5132 - Manual (Page 73)

73
AT8xC5132
4173A–8051–08/02
Registers Table 72. USBCON Register
USBCON (S:BCh) – USB Global Control Register
Reset Value = 0000 0000b
7 6 5 4 3 2 1 0
USBE SUSPCLK SDRMWUP - UPRSM RMWUPE CONFG FADDEN
Bit Number
Bit
Mnemonic Description
7 USBE
USB Enable Bit
Set to enable the USB controller.
Clear to disable and reset the USB controller.
6 SUSPCLK
Suspend USB Clock Bit
Set to disable the 48 MHz clock input (Resume Detection is still active).
Clear to enable the 48 MHz clock input.
5 SDRMWUP
Send Remote Wake-up Bit
Set to force an external interrupt on the USB controller for Remote Wake UP
purpose.
An upstream resume is send only if the bit RMWUPE is set, all USB clocks are
enabled AND the USB bus was in SUSPEND state for at least 5 ms. See
UPRSM below.
Cleared by software.
4 -
Reserved
The values read from this bit is always 0. Do not set this bit.
3 UPRSM
Upstream Resume Bit (read only)
Set by hardware when SDRMWUP has been set and if RMWUPE is enabled.
Cleared by hardware after the upstream resume has been sent.
2 RMWUPE
Remote Wake-up Enable Bit
Set to enable request an upstream resume signalling to the host.
Clear after the upstream resume has been indicated by RSMINPR.
Note: Do not set this bit if the host has not set the
DEVICE_REMOTE_WAKEUP feature for the device.
1 CONFG
Configuration Bit
Set after a SET_CONFIGURATION request with a non-zero value has been
correctly processed.
Cleared by software when a SET_CONFIGURATION request with a zero value
is received.
Cleared by hardware on hardware reset or when an USB reset is detected on
the bus.
0 FADDEN
Function Address Enable Bit
Set by the device firmware after a successful status phase of a
SET_ADDRESS transaction. It shall not be cleared afterwards by the device
firmware.
Cleared by hardware on hardware reset or when an USB reset is received.
When this bit is cleared, the default function address is used (0).