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Watchdog operation – Rainbow Electronics AT89C5132 User Manual

Page 59

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59

AT8xC5132

4173A–8051–08/02

Watchdog Operation

After reset, the WDT is disabled. The WDT is enabled by writing the sequence 1Eh and
E1h into the WDTRST register. As soon as it is enabled, there is no way except the chip
reset to disable it. If it is not cleared using the previous sequence, the WDT overflows
and forces a chip reset. This overflow generates a high level 96 oscillator periods pulse
on the RST pin to globally reset the application.

The WDT time-out period can be adjusted using WTO2:0 Bits located in the WDTPRG
register accordingly to the formula shown in Figure 39. In this formula, WTOval repre-
sents the decimal value of WTO2:0 Bits. Table 65 reports the time-out period depending
on the WDT frequency.

Figure 39. WDT Time-Out Formula

Notes:

1. These frequencies are achieved in X1 mode, F

WDT

= F

OSC

÷

2.

2. These frequencies are achieved in X2 mode, F

WDT

= F

OSC

.

WDT Behavior During Idle and
Power-down Modes

Operation of the WDT during power reduction modes deserves special attention.
The WDT continues to count while the AT8xC5132 are in Idle mode. This means that
the user must dedicate some internal or external hardware to service the WDT during
Idle mode. One approach is to use a peripheral Timer to generate an interrupt request
when the Timer overflows. The interrupt service routine then clears the WDT, reloads
the peripheral Timer for the next service period and puts the AT8xC5132 back into Idle
mode.

The Power-down mode stops all phase clocks. This causes the WDT to stop counting
and to hold its count. The WDT resumes counting from where it left off if the Power-
down mode is terminated by INT0, INT1 or keyboard interrupt. To ensure that the WDT
does not overflow shortly after exiting the Power-down mode, it is recommended to clear
the WDT just before entering Power-down mode.

The WDT is cleared and disabled if the Power-down mode is terminated by a reset.

WDT

TO

=

F

WDT

6

⋅ ((

2

14

2

WTOval

) – 1)

WTO2

WTO1

WTO0

F

WDT

6 MHz

(1)

8 MHz

(1)

10 MHz

(1)

12 MHz

(2)

16 MHz

(2)

20 MHz

(2)

0

0

0

16.38 ms

12.28 ms

9.83 ms

8.19 ms

6.14 ms

4.92 ms

0

0

1

32.77 ms

24.57 ms

19.66 ms

16.38 ms

12.28 ms

9.83 ms

0

1

0

65.54 ms

49.14 ms

39.32 ms

32.77 ms

24.57 ms

19.66 ms

0

1

1

131.07 ms

98.28 ms

78.64 ms

65.54 ms

49.14 ms

39.32 ms

1

0

0

262.14 ms

196.56 ms

157.29 ms

131.07 ms

98.28 ms

78.64 ms

1

0

1

524.29 ms

393.12 ms

314.57 ms

262.14 ms

196.56 ms

157.29 ms

1

1

0

1.05 s

786.24 ms

629.15 ms

524.29 ms

393.12 ms

314.57 ms

1

1

1

2.10 s

1.57 s

1.26 s

1.05 s

786.24 ms

629.15 ms