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Configuration – Rainbow Electronics AT89C5132 User Manual

Page 124

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124

AT8xC5132

4173A–8051–08/02

Configuration

The SPI configuration is made through SPCON.

Master Configuration

The SPI operates in master mode when the MSTR bit in SPCON is set.

Slave Configuration

The SPI operates in slave mode when the MSTR bit in SPCON is cleared and data has
been loaded in SPDAT.

Data Exchange

There are two possible Policies to exchange data in master and slave modes:

polling

interrupts

Master Mode with Polling
Policy

Figure 101 shows the initialization phase and the transfer phase flows using the polling
policy. Using this flow prevents any overrun error occurrence.

The bit rate is selected according to Table 113.

The transfer format depends on the slave peripheral.

SS may be deasserted between transfers depending also on the slave peripheral.

SPIF flag is cleared when reading SPDAT (SPSTA has been read before by the
“end of transfer” check).

This policy provides the fastest effective transmission and is well adapted when commu-
nicating at high speed with other Microcontrollers. However, the procedure may then be
interrupted at any time by higher priority tasks.

Figure 101. Master SPI Polling Policy Flows

SPI Initialization

Polling Policy

Disable Interrupt

SPIE = 0

SPI Transfer

Polling Policy

End Of Transfer?

SPIF = 1?

Select Master Mode

MSTR = 1

Select Bit Rate

program SPR2:0

Select Format

program CPOL & CPHA

Enable SPI

SPEN = 1

Select Slave

Pn.x = L

Start Transfer

Write Data in SPDAT

Last Transfer?

Get Data Received

Read SPDAT

Deselect Slave

Pn.x = H