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Timer 1, Gh figure 34 s, Ee figure 34) – Rainbow Electronics AT89C5132 User Manual

Page 53

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53

AT8xC5132

4173A–8051–08/02

Figure 34. Timer/Counter 0 in Mode 3: Two 8-bit Counters

Figure 35. Mode 3 Overflow Period Formula

Timer 1

Timer 1 is identical to Timer 0 excepted for Mode 3 which is a hold-count mode. Follow-
ing comments help to understand the differences:

Timer 1 functions as either a Timer or event Counter in three modes of operation.
Figure 28 through Figure 32 show the logical configuration for modes 0, 1, and 2.
Timer 1’s mode 3 is a hold-count mode.

Timer 1 is controlled by the four high-order Bits of TMOD register (see Table 59)
and Bits 2, 3, 6 and 7 of TCON register (see Figure 58). TMOD register selects the
method of Timer gating (GATE1), Timer or Counter operation (C/T1#) and mode of
operation (M11 and M01). TCON register provides Timer 1 control functions:
overflow flag (TF1), run control bit (TR1), interrupt flag (IE1) and interrupt type
control bit (IT1).

Timer 1 can serve as the Baud Rate Generator for the Serial Port. Mode 2 is best
suited for this purpose.

For normal Timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented
by the selected input. Setting GATE1 and TR1 allows external pin INT1 to control
Timer operation.

Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag generating
an interrupt request.

When Timer 0 is in mode 3, it uses Timer 1’s overflow flag (TF1) and run control bit
(TR1). For this situation, use Timer 1 only for applications that do not require an
interrupt (such as a Baud Rate Generator for the Serial Port) and switch Timer 1 in
and out of mode 3 to turn it off and on.

It is important to stop the Timer/Counter before changing modes.

Mode 0 (13-bit Timer)

Mode 0 configures Timer 1 as a 13-bit Timer, which is set up as an 8-bit Timer (TH1 reg-
ister) with a modulo-32 prescaler implemented with the lower 5 Bits of the TL1 register
(see Figure 28). The upper 3 Bits of TL1 register are ignored. Prescaler overflow incre-
ments TH1 register.

TR0

TCON.4

TF0

TCON.5

INT0#

0

1

GATE0

TMOD.3

Overflow

Timer 0
Interrupt
Request

C/T0#

TMOD.2

TL0

(8 Bits)

TR1

TCON.6

TH0

(8 Bits)

TF1

TCON.7

Overflow

Timer 1
Interrupt
Request

T0

TIM0

CLOCK

÷

6

TIM0

CLOCK

÷

6

TF0

PER

=

F

TIM0

6

(256 – TL0)

TF1

PER

=

F

TIM0

6

(256 – TH0)